Laurent T Email
PMTS Silicon Design Engineer @ AMD
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Laurent T Location
- Markham, ON, CA
Laurent T Work
- PMTS Silicon Design Engineer @ (July 2025 - Present)
- SMTS Silicon Design Engineer @ (July 2020 - July 2025)
- MTS Design Engineer @ (May 2017 - July 2020)
- Hardware Engineer @ (May 2015 - May 2017)
- FPGA Design Engineer @ (September 2012 - May 2015)
- Hardware Engineer @ (June 2012 - September 2012)
- Hardware Engineer @ (February 2012 - June 2012)
- Hardware Engineer @ (September 2008 - January 2012)
- Hardware Designer @ (September 2005 - August 2008)
- Electronics Technician @ (September 2003 - August 2005)
Laurent T Education
- ESCPI CNAM, Paris
Master's Degree
2005-2008 - CNAM, Paris
Bachelor's Degree
2003-2005 - Lycée Jean Moulin, Torcy
Baccalaureate (High School)
1999-2003
Laurent T Summary
- Laurent T, based in Markham, ON, CA, is currently a PMTS Silicon Design Engineer at AMD. Laurent T brings experience from previous roles at AMD, WDI Wise Device Inc. and FUJIFILM VisualSonics, Inc.. Laurent T holds a 2005 - 2008 Master's Degree @ ESCPI CNAM, Paris. Laurent T has 1 emails on RocketReach.
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