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Lars Melzer Work
VP Digital Design @ (August 2026 - Present)
Managing Director @ (January 2016 - Present)
Director Digital Design @ (May 2023 - July 2026)
Manager Digital Design @ (February 2011 - December 2015)
Manager IC Design @ (April 2009 - January 2011)
Senior IC Design Engineer @ (September 2005 - March 2009)
Lead Engineer Digital Design @ Infineon Flash (December 2004 - August 2005)
IC Design Team Leader @ (January 2001 - January 2004)
Scientific Staff @ TU Chemnitz (January 1997 - January 2001)
Lars Melzer Education
Technische Universität Chemnitz
(Design)
1991-1997
Lars Melzer Skills
RTL design
Integrated Circuit Design
Verilog
VHDL
Perl
TCL
Functional Verification
Cadence
Synopsys tools
Mentor
Logic Synthesis
Static Timing Analysis
Timing Closure
LTE
ASIC
FPGA
System on Chip
Project Management
People Management
Semiconductor
Low Power Design
Embedded Systems
Hardware Architecture
MS Project
Project Planning and Tracking
Telekommunikation
3GPP
Integrated Circuit
Produktentwicklung
Project Planning
Lars Melzer Summary
Lars Melzer, is currently a VP Digital Design at Ferroelectric Memory Company. Lars Melzer brings experience from previous roles at Commsolid, NXP Semiconductors, Intel Mobile Communications GmbH and Blue Wonder Communications GmbH. Lars Melzer holds a 1991 - 1997 Technische Universität Chemnitz. With a robust skill set that includes RTL design, Integrated Circuit Design, Verilog, VHDL, Perl and more. Lars Melzer has 4 emails on RocketReach.
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