L Rao Email
Core Structural Design Engineer @ Intel Corporation
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L Rao Location
- Bengaluru, KA, IN
L Rao Work
- Core Structural Design Engineer @ (August 2018 - Present)
- Intern @ (August 2017 - August 2018)
- Content Developer @ Gate Academy Publications. (February 2014 - July 2015)
L Rao Education
- Vellore Institute of Technology
Master of Technology (VLSI Design)
2016-2018 - Chhattisgarh Swami Vivekanand Technical University, Bhilai
Bachelor of Engineering - BE (Electrical, Electronics and Communications Engineering)
2009-2013
L Rao Skills
- Verilog
- Perl
- TCL
- Physical Design
- Synopsys tools
- CADENCE SKILL PROGRAMMING
- Static Timing Analysis
- Application-Specific Integrated Circuits (ASIC)
- DFT
- FPGA
- Altera
- System Verilog
- Cade
- CMOS
- Cadence Virtuoso
- Cadence Encounter
L Rao Summary
- L Rao, based in Bengaluru, KA, IN, is currently a Core Structural Design Engineer at Intel Corporation. L Rao brings experience from previous roles at NXP Semiconductors and Gate Academy Publications.. L Rao holds a 2016 - 2018 Master of Technology in VLSI Design @ Vellore Institute of Technology. With a robust skill set that includes Verilog, Perl, TCL, Physical Design, Synopsys tools and more. L Rao has 3 emails on RocketReach.
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