Design Verification Engineer @ (June 2017 - February 2025)
Graduate Technical Intern @ (January 2017 - May 2017)
Verification Engineer trainee @ (October 2014 - August 2015)
Kushal Reddy Education
University of Southern California
Master of Science (M.S.) (Electrical and Electronics Engineering)
2015-2017
RV College Of Engineering
Bachelor of Engineering (BE) (Electrical, Electronics and Communications Engineering)
2010-2014
Kushal Reddy Skills
Cadence Virtuoso
Linux
Field Programmable Gate Arrays Fpga
C
Perl
Matlab
UVM
Perl Automation
Xilinx ISE
Verilog
Engineering
Cadence
Microsoft Office
Java
Testing
Application Specific Integrated Circuits Asic
VHDL
ModelSim
C++
Python
SystemVerilog
Teamwork
Research
Very Large Scale Integration Vlsi
Simulink
Very Large Scale Integration
Field Programmable Gate Arrays
Application Specific Integrated Circuits
Kushal Reddy Summary
Kushal Reddy, based in Sacramento, CA, US, is currently a Design Verification Engineer at Apple. Kushal Reddy brings experience from previous roles at Intel Corporation and UTC Aerospace Systems. Kushal Reddy holds a 2015 - 2017 Master of Science (M.S.) in Electrical and Electronics Engineering @ University of Southern California. With a robust skill set that includes Cadence Virtuoso, Linux, Field Programmable Gate Arrays Fpga, C, Perl and more. Kushal Reddy has 2 emails and 2 mobile phone numbers on RocketReach.
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