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Krunal Joshi Location
San Jose, CA, US
Krunal Joshi Work
2024 -now Smts silicon design engineer @
2021 -2024 Physical Design Engineer @
2017 -2021 Senior Engineer @
2011 -2017 Senior Engineer (Level 1) @
2011 -2017 Consultant @
2011 -2011 Trainee engineer @ eiTRA
Krunal Joshi Education
Charotar Inst. of Technology
B.E (Electronics and Communication)
2005-2011
S.D.A
I.S.C (PCM)
1999-2005
Reubs Primary School
Primary education
1991-1998
Krunal Joshi Skills
Linux
C
System on a Chip Soc
Physical Verification
Perl
ASIC
Icc
VLSI
Verilog
Xilinx
TCL
Java
Embedded Systems
Application Specific Integrated Circuits Asic
SoC
VHDL
C++
Timing Closure
SystemVerilog
Physical Design
Static Timing Analysis
Very Large Scale Integration Vlsi
Shell Scripting
Very Large Scale Integration
Application Specific Integrated Circuits
System on a Chip
Krunal Joshi Summary
Krunal Joshi, based in San Jose, CA, US, is currently a Smts silicon design engineer at AMD. Krunal Joshi brings experience from previous roles at Intel Corporation, eInfochips (An Arrow Company) and Juniper Networks. Krunal Joshi holds a 2005 - 2011 B.E in Electronics and Communication @ Charotar Inst. of Technology. With a robust skill set that includes Linux, C, System on a Chip Soc, Physical Verification, Perl and more. Krunal Joshi has 2 emails and 2 mobile phone numbers on RocketReach.
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