Konstantinos Padarnitsas's Location
Grünwald, BY, DE
Konstantinos Padarnitsas's Work
- Digital Design Verification Manager @ Codasip
- Senior Manager Digital Design and Verification @ Infineon Technologies
- Principal Verification Engineer @ Infineon Technologies
- Senior Staff Verification Engineer @ Infineon Technologies
- Staff Verification Engineer for Automotive Products @ Infineon Technologies
- Digital IC Design and Verification Engineer @ TES Electronic Solutions GmbH
- Architecture and Microarchitecture CPU Verification Engineer @ Intel Corporation
- Digital Design Engineer @ Advanced Learning and Research Institute, ALaRI
- Research Assistant @ Advanced Learning and Research Institute, ALaRI
Konstantinos Padarnitsas's Education
- Università della Svizzera italiana (USI)
Master's degree (Embedded Systems Design)
2008 - 2010 - Aristoteleion Panepistimion Thessalonikis
Engineer's degree (Electrical and Electronics Engineering)
2002 - 2008
Konstantinos Padarnitsas's Skills
- VHDL
- Embedded Systems
- RTL design
- Xilinx
- SystemC
- Computer Architecture
- FPGA
- Hardware Architecture
- Embedded Linux
- ModelSim
Konstantinos Padarnitsas's Summary
Konstantinos Padarnitsas, based in Grünwald, BY, DE, is currently a Digital Design Verification Manager at Codasip, bringing experience from previous roles at Infineon Technologies. Konstantinos Padarnitsas holds a 2008 - 2010 Master's degree in Embedded Systems Design @ Università della Svizzera italiana (USI). With a robust skill set that includes VHDL, Embedded Systems, RTL design, Xilinx, SystemC and more, Konstantinos Padarnitsas contributes valuable insights to the industry. Konstantinos Padarnitsas has 2 emails on RocketReach.
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