Kok Yeo Email
Analog and Power Management Design Engineer @ PI Semiconductor
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Kok Yeo Location
- Shanghai, China
Kok Yeo Work
- Analog and Power Management Design Engineer @ (January 2022 - Present)
- Analog Power IC Design Engineer @ (July 2021 - December 2021)
- Senior Staff Design Engineer @ (September 2019 - June 2021)
- Senior Staff Design Engineer @ (December 2016 - September 2019)
- Principal Member of Technical Staff @ (August 2014 - September 2016)
- Senior Member of Technical Staff @ (October 2013 - August 2014)
- Senior Staff IC Design Engineer @ Volterra Alumni Network (July 2012 - September 2013)
- Staff IC Design Engineer @ Volterra Alumni Network (July 2009 - June 2012)
- IC Design Manager @ (September 2007 - June 2009)
- Staff IC Design Engineer @ (December 2005 - September 2007)
- Principal IC Design Engineer @ (January 2004 - November 2005)
- Principal IC Design Engineer @ (February 2000 - June 2003)
- IC Design Engineer - Assistant Manager @ Sony Semiconductor Design Centre Singapore (June 1995 - January 2000)
Kok Yeo Education
- National University of Singapore
Master of Science (Electrical Engineering (Major in Microelectronics))
2001-2003 - National University of Singapore
Master of Science (Management of Technology)
1999-2001 - Nanyang Technological University Singapore
Master of Science (Communication and Network Systems (Major in RF Engineering))
1996-1999 - Nanyang Technological University Singapore
B Eng (1st class) (Electrical Engineering)
1992-1995 - Singapore Polytechnic
Diploma in Electronic and Communication Engineering
1986-1989
Kok Yeo Skills
- ASIC
- Analog
- Analog Circuit Design
- Application-Specific Integrated Circuits (ASIC)
- CMOS
- Circuit Design
- Electronics
- IC
- Integrated Circuit Design
- Integrated Circuits (IC)
- Mixed Signal
- Power Management
- Product Engineering
- Semiconductor Industry
- Semiconductors
- Sensors
- SoC
- Verilog
- PowerPoint
- Power
- Engineers
- Microsoft Word
- Customer Service
- Management
- Design
- Project Management
Kok Yeo Summary
- Kok Yeo, based in Shanghai, China, is currently a Analog and Power Management Design Engineer at PI Semiconductor. Kok Yeo brings experience from previous roles at Innovision Semiconductor, Inc., Espressif Systems, Silanna Semiconductor and Maxim Integrated. Kok Yeo holds a 2001 - 2003 Master of Science in Electrical Engineering (Major in Microelectronics) @ National University of Singapore. With a robust skill set that includes ASIC, Analog, Analog Circuit Design, Application-Specific Integrated Circuits (ASIC), CMOS and more. Kok Yeo has 3 emails on RocketReach.
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