Kit Cheong Location
Palo Alto, CA, US
Kit Cheong Work
- 2010 - now Compiler development @ Vivante Corporation
- 2002 - 2009 Engineering Group Director @ Cadence Design Systems
- 1999 - 2002 static timing analyzer project lead @ Silicon Perspective Corporation
- 1997 - 1999 MTS @ Bell Lab Design Automation/Cadence design systems
- 1996 - 1997 Digtal Simulation and Analysis team lead @ Rockwell Semiconductor Systems, Newport Beach CA
- 1986 - 1995 MTS @ AT&T Bell Labs, Murray Hill, NJ
Kit Cheong Education
- University of Minnesota
BS (Mathematics and Computer Science)
- University of Minnesota
MS (Computer Science)
Kit Cheong Skills
- Leadership
- Development
- PowerPoint
- Linux
- Algorithms
- C
- Debugging
- Windows
- Perl
- ASIC
Kit Cheong Summary
Kit Cheong, based in Palo Alto, CA, US, is currently a Compiler development at Vivante Corporation. Kit Cheong brings experience from previous roles at Cadence Design Systems, Silicon Perspective Corporation, Bell Lab Design Automation/Cadence design systems and Rockwell Semiconductor Systems, Newport Beach CA. Kit Cheong holds a BS in Mathematics and Computer Science @ University of Minnesota. With a robust skill set that includes Leadership, Development, PowerPoint, Linux, Algorithms and more. Kit Cheong has 3 emails and 2 mobile phone numbers on RocketReach.
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Top Vivante Corporation Employees
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Mike Cai
CTO at Vivante Corporation
Santa Clara, CA, US25+ -
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Principal Engineer at Vivante Corporation
Cupertino, CA, US35 -
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San Jose, CA, US32 -
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Ping Wang
Architect at Vivante Corporation
California, United States11 -
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Fremont, CA, US22 -
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QA engineer at Vivante Corporation
Chengdu, Sichuan, China21
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