Kin-Kee Sit Email & Phone Number
VP of VLSI @ Ambarella Inc
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Kin-Kee Sit Location
- Santa Clara, CA, US
Kin-Kee Sit Work
- 2021 -now VP of VLSI @
- 2004 -2021 Director of VLSI @
- 2002 -2004 Staff Engineer @
- 2001 -2002 MTS @ Afara Websystems (acquired by Sun Microsystems)
- 1997 -2001 Senior Design Engineer @
Kin-Kee Sit Education
- Stanford University
MSEE (Computer Architecture, VLSI)
1995-1997 - University of Wisconsin-Madison
BSEE (Electrical and Computer Engineering, Physics)
1991-1995
Kin-Kee Sit Skills
- SoC
- Semiconductors
- ASIC
- RTL design
- Intel
- VLSI
- Computer Architecture
- Verilog
- Timing Closure
- Processors
- Static Timing Analysis
- EDA
- Microprocessors
- Functional Verification
- SystemVerilog
- Debugging
- Hardware Architecture
- Digital Signal Processors
- ARM
- Firmware
- TCL
- System on a Chip (SoC)
- Very-Large-Scale Integration (VLSI)
- ARM Architecture
- Application-Specific Integrated Circuits (ASIC)
- Leadership
- System On A Chip Soc
- Photoshop
- Microsoft Excel
- Application Specific Integrated Circuits Asic
- Very Large Scale Integration Vlsi
- System on a Chip
- Very Large Scale Integration
- Application Specific Integrated Circuits
Kin-Kee Sit Summary
- Kin-Kee Sit, based in Santa Clara, CA, US, is currently a VP of VLSI at Ambarella Inc. Kin-Kee Sit brings experience from previous roles at Ambarella, Sun Microsystems, Afara Websystems (acquired by Sun Microsystems) and Intel. Kin-Kee Sit holds a 1995 - 1997 MSEE in Computer Architecture, VLSI @ Stanford University. With a robust skill set that includes SoC, Semiconductors, ASIC, RTL design, Intel and more. Kin-Kee Sit has 2 emails and 2 mobile phone numbers on RocketReach.
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