Ke Jiang Email & Phone Number
Senior Hardware Design Engineer @ ARECONT VISION LTD
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Ke Jiang Location
- United States
Ke Jiang Work
- Senior Hardware Design Engineer @ (September 2015 - Present)
- CMOS Sensor Project Lead @ Fudan Microelectronics (September 2011 - March 2015)
- Senior Design Engineer @ Altasens (March 2009 - September 2011)
- Senior design engineer @ (March 2005 - October 2008)
- Principle engineer @ ProImage (January 2008 - January 2008)
- Senior design engineer @ IC Media (March 2001 - March 2005)
- Member of Technical Staff @ Bell Labs (China) (August 1998 - February 2001)
Ke Jiang Education
- Fudan University
- SheHong High School
Ke Jiang Skills
- ASIC
- Analog
- CMOS
- Digital Signal Processors
- EDA
- Embedded Systems
- FPGA
- Hardware Architecture
- IC
- Mixed Signal
- Semiconductors
- Sensors
- SoC
- Verilog
Ke Jiang Summary
- Ke Jiang, based in United States, is currently a Senior Hardware Design Engineer at Arecont Vision. Ke Jiang brings experience from previous roles at Fudan Microelectronics, Altasens, Magnachip and ProImage. Ke Jiang holds a Fudan University. With a robust skill set that includes ASIC, Analog, CMOS, Digital Signal Processors, EDA and more. Ke Jiang has 1 emails and 1 mobile phone numbers on RocketReach.
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