Katie Purcell's Location

Mountain View, CA, US

Katie Purcell's Work

Katie Purcell's Education

  • Stanford University

    Master of Science (MS)

    1998 - 2000
  • Carnegie Mellon University

    Bachelor of Science (B.S.)

    1994 - 1998
  • EPFL (École polytechnique fédérale de Lausanne)

    Exchange program

    1996 - 1997

Katie Purcell's Skills

  • Integrated Circuit Design
  • ASIC
  • Verilog
  • FPGA
  • Primetime
  • Logic Synthesis
  • Semiconductors
  • Microprocessors
  • Compilers
  • SoC

Katie Purcell's Summary

Katie Purcell, based in Mountain View, CA, US, is currently a Sr. Staff Engineer, Architecture and Design at Achronix Semiconductor Corporation, bringing experience from previous roles at Achronix Semiconductor Corporation and MoSys, Inc.. Katie Purcell holds a 1998 - 2000 Master of Science (MS) @ Stanford University. With a robust skill set that includes Integrated Circuit Design, ASIC, Verilog, FPGA, Primetime and more, Katie Purcell contributes valuable insights to the industry. Katie Purcell has 5 emails on RocketReach.

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