Kanav Sharma Email & Phone Number
Digital Design Verification Engineer @ Cirrus Logic
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Kanav Sharma Location
- Austin, TX, US
Kanav Sharma Work
- 2022 -now Digital Design Verification Engineer @
- 2014 -2022 Digital design verification engineer @
- 2014 -2014 Digital Verification Intern @
- 2012 -2014 Master of Science in Engineering(MSE), Mixed Signal Circuit Design @
- 2013 -2013 Instructional Aide @
- 2013 -2013 MSA Design Verification Intern @
- 2010 -2011 Senior Engineer @
Kanav Sharma Education
- Arizona State University
Master of Science in Engineering(MSE) (Mixed Signal Circuit Design)
2012-2014 - Sardar Patel University
Bachelor of Engineering (BE) (Electrical, Electronics and Communications Engineering)
2006-2010
Kanav Sharma Summary
- Kanav Sharma, based in Austin, TX, US, is currently a Digital Design Verification Engineer at Cirrus Logic. Kanav Sharma brings experience from previous roles at NXP Semiconductors and Arizona State University. Kanav Sharma holds a 2012 - 2014 Master of Science in Engineering(MSE) in Mixed Signal Circuit Design @ Arizona State University. Kanav Sharma has 4 emails and 2 mobile phone numbers on RocketReach.
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