Kamlesh Pathak Email
Principal Engineer @ Arm
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Kamlesh Pathak Location
- Austin, TX, US
Kamlesh Pathak Work
- Principal Engineer @ (February 2025 - Present)
- Front End Methodology, Virtual Platform Lead @ (March 2019 - March 2025)
- Senior 5G ASIC Engineer @ (June 2018 - March 2019)
- Senior Staff Engineer @ (June 2016 - June 2018)
- Senior Technical Manager @ (November 2012 - March 2016)
- Project Manager @ (October 2010 - October 2012)
- Senior Design Engineer @ (January 2003 - September 2010)
- Co-Chair, IP-XACT TC SWG @ (July 2012 - March 2016)
Kamlesh Pathak Education
- Indian Institute of Technology, Delhi
M.Tech. (Computer Technology)
-
B.Tech. (Electronics & Communication Engg)
Kamlesh Pathak Skills
- IP-XACT
- SoC
- Perl
- TCL
- C++
- SystemC
- XML
- Debugging
- TLM
- ASIC
- Java
- ARM
- C
- Functional Verification
- Eclipse
- VSoC
- SystemVerilog
- UVM
- XSLT
- XPath
- DITA
- EDA
- Semiconductors
- VHDL
- Verilog
- QEMU
- Application-Specific Integrated Circuits (ASIC)
- System on a Chip (SoC)
- Virtulizer
- Python
- Virtual Platforms
- TGI
Kamlesh Pathak Summary
- Kamlesh Pathak, based in Austin, TX, US, is currently a Principal Engineer at Arm. Kamlesh Pathak brings experience from previous roles at Intel Corporation, Ericsson, Qualcomm and ST Microelectronics. Kamlesh Pathak holds a M.Tech. in Computer Technology @ Indian Institute of Technology, Delhi. With a robust skill set that includes IP-XACT, SoC, Perl, TCL, C++ and more. Kamlesh Pathak has 2 emails on RocketReach.
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