2011 -
2011 Graduate Intern @ Samsung Austin R&D Center
2004 -
2008 Design Engineer @
Junyoung Park Education
The University of Texas at Austin
Doctor of Philosophy (Ph.D.) (Electrical and Computer Engineering)
2008
-
2013
Pohang University of Science and Technology (POSTECH)
Master of Science (M.S.) (Electrical and Computer Engineering)
2003
-
2005
Sogang University
Bachelor of Science (B.S.) (Electrical and Computer Engineering)
1999
-
2003
Junyoung Park Skills
Verilog Simulator (NC-Verilog, VCS, Modelsim)
Synthesis (Design Compiler)
STA (Primetime)
Circuit-level Simulator (HSPICE, Spectre)
Verification tools (Formality, Specman)
Place & Route (IC Compiler, Encounter)
Script language (Perl, Tcl)
RTL design
Verilog
ASIC
Static Timing Analysis
Low-power Design
P&R
Circuit Level Simulator Hspice
Verification Tools Formality
Verilog Simulator Nc Verilog
Encounter
Specman
Data Validation
Spectre
Synthesis Design Compiler
Validation
Sta Primetime
TCL
Circuit Design
Place And Route Ic Compiler
Analytical Skill
VCS
ModelSim
Script Language Perl
Design
Low Power Design
Analysis
Verilog Simulator
Synthesis
Sta
Circuit Level Simulator
Verification Tools
Place and Route
Script Language
Junyoung Park Summary
Junyoung Park, based in Austin, TX, US, is currently a Component Design Engineer at Intel Corporation. Junyoung Park brings experience from previous roles at Intel Corporation, Samsung Austin R&D Center and Samsung Semiconductor (System LSI). Junyoung Park holds a 2008 - 2013 Doctor of Philosophy (Ph.D.) in Electrical and Computer Engineering @ The University of Texas at Austin. With a robust skill set that includes Verilog Simulator (NC-Verilog, VCS, Modelsim), Synthesis (Design Compiler), STA (Primetime), Circuit-level Simulator (HSPICE, Spectre), Verification tools (Formality, Specman) and more. Junyoung Park has 5 emails and 1 mobile phone numbers on RocketReach.
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