Junlin Lu's Location
Cupertino, CA, US
Junlin Lu's Work
- ASIC Design Engineer @ Apple
- Senior and Staff ASIC Design Engineer @ SK hynix memory solutions America Inc.
Junlin Lu's Education
- Columbia University in the City of New York
Master of Science (MS) (Electrical and Electronics Engineering)
2012 - 2014 - Beihang University
Bachelor of Engineering (B.Eng.) (Electrical Engineering)
2008 - 2012 - Chengdu Shude High School2005 - 2008
Junlin Lu's Skills
- Altera Quartus
- Memory
- Cadence Virtuoso
- C
- RTL design
- Matlab
- High Level Synthesis
- ASIC
- Verilog
- Solutions
Junlin Lu's Summary
Junlin Lu, based in Cupertino, CA, US, is currently a ASIC Design Engineer at Apple, bringing experience from previous roles at SK hynix memory solutions inc.. Junlin Lu holds a 2012 - 2014 Master of Science (MS) in Electrical and Electronics Engineering @ Columbia University in the City of New York. With a robust skill set that includes Altera Quartus, Memory, Cadence Virtuoso, C, RTL design and more, Junlin Lu contributes valuable insights to the industry. Junlin Lu has 1 email on RocketReach.
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