1990 -
1997 Design Manager @ East China Institute of Photo-Electron IC
Jun Li Education
Nanjing University of Science and Technology
Jun Li Skills
TCL
EDA
Digital IC Design
RTL Development
Unified Power Format (UPF)
Multi-site Teams
Clocking
Power Analysis
Front-End Development
Functional Verification
Debuggers
Problem Solving
Architectural Design
Perl
Python (Programming Language)
Bandwidth
Power Estimation
Formal Verification
Computer-Aided Design (CAD)
Hardware Engineers
Electrical Engineering
Computer Science
Digital Designs
Interconnects
Presentations
IO
Tape
Silicon Validation
Microarchitecture
Logic Gates
Logic Design
Layout Versus Schematic (LVS)
Global Distribution Systems (GDS)
Floor Plans
DFT
ASIC
Debugging
IC
Embedded Systems
Semiconductors
Circuit Design
SoC
RTL Design
Analog
Static Timing Analysis
Verilog
Firmware
Mixed Signal
FPGA
VLSI
Hardware Architecture
Cadence Virtuoso
CMOS
Timing Closure
SystemVerilog
Product Development
Jun Li Summary
Jun Li, based in Fremont, CA, US, is currently a Principal SOC Design Engineer at Avalanche Technology Inc.. Jun Li brings experience from previous roles at XingMem Technology Corporation, Cypress Semiconductor Corporation and Galvantech Inc. Jun Li holds a Nanjing University of Science and Technology. With a robust skill set that includes TCL, EDA, Digital IC Design, RTL Development, Unified Power Format (UPF) and more. Jun Li has 2 emails and 2 mobile phone numbers on RocketReach.
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