Juay Tan Email & Phone Number
Principal Design Verification Engineer
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Juay Tan Location
- San Jose, CA, US
Juay Tan Work
- 2016 -now Principal Design Verification Engineer @ SK Hynix Memories System
- 2013 -2016 Staff Design Verification Engineer @
Juay Tan Education
- Utah State University
MSEE
- NTUEE
Juay Tan Skills
- SystemVerilog
- Semiconductors
- UVM
- Embedded Systems
- ASIC
- SoC
- Verilog
- Emulation
- C
- C++
- Debugging
- Perl
- IC
Juay Tan Summary
- Juay Tan, based in San Jose, CA, US, is currently a Principal Design Verification Engineer at SK Hynix Memories System. Juay Tan brings experience from previous roles at Infinera Corp. Juay Tan holds a MSEE @ Utah State University. With a robust skill set that includes SystemVerilog, Semiconductors, UVM, Embedded Systems, ASIC and more. Juay Tan has 3 emails and 2 mobile phone numbers on RocketReach.
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