Joydip Das Email & Phone Number
Staff Engineer @ Samsung Semiconductor
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Joydip Das Location
- Austin, TX, US
Joydip Das Work
- 2016 -now Staff Engineer @
- 2019 -2022 Chair of Special Interest Group on ML and EDA @
- 2012 -2016 Senior Hardware Engineer @
- 2008 -2012 Research Assistant and Ph. D. Candidate @
- 2004 -2006 Research Assistant @
Joydip Das Education
- The University of British Columbia
Doctor of Philosophy (Ph.D.) (Computer Engineering)
2008-2012 - University of Louisiana at Lafayette
Master of Science (Computer Engineering)
2004-2006 - Bangladesh University of Engineering and Technology
Bachelor of Science (Electrical Engineering and Electronics)
Joydip Das Skills
- Cadence Framework
- Cadence Virtuoso
- C
- Perl
- Python
- C++
- Matlab
- Linux
- FPGA
- VHDL
- VLSI
- Simulation
- ASIC
- Computer Architecture
- Fortran
- Simulations
- Verilog
- Artificial Neural Networks
- Field Programmable Gate Arrays Fpga
- Algorithms
- Graphics
- Data Analysis
- Xilinx
- Cadence
- ModelSim
- Altera
- Physical Design
- Mentor Graphics
- Computer Aided Design Cad
- Static Timing Analysis
- Machine Learning
- Low Power Design
- Field Programmable Gate Arrays
- Computer Aided Design
Joydip Das Summary
- Joydip Das, based in Austin, TX, US, is currently a Staff Engineer at Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab. Joydip Das brings experience from previous roles at Silicon Integration Initiative, Inc., Achronix Semiconductor, University of British Columbia and The Center for Advanced Computer Studies, University of Louisiana at Lafayette. Joydip Das holds a 2008 - 2012 Doctor of Philosophy (Ph.D.) in Computer Engineering @ The University of British Columbia. With a robust skill set that includes Cadence Framework, Cadence Virtuoso, C, Perl, Python and more. Joydip Das has 3 emails and 1 mobile phone numbers on RocketReach.
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