Joydeep Debnath Email
Senior Analog Design Engineer @ Renesas Electronics
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Joydeep Debnath Location
- Bengaluru, KA, IN
Joydeep Debnath Work
- Senior Analog Design Engineer @ (September 2024 - Present)
- Analog Design Engineer @ (August 2022 - August 2024)
- Analog Design Engineer @ Texas Instruments (November 2021 - August 2022)
- Analog Engineer @ Texas Instruments (August 2020 - November 2021)
- Analog Design Intern @ Texas Instruments (June 2019 - July 2019)
- Analog Validation Intern @ Texas Instruments (May 2019 - June 2019)
- Summer Intern 2018 @ (May 2018 - June 2018)
- Summer Intern 2017 @ (June 2017 - July 2017)
Joydeep Debnath Education
- Jadavpur University
Bachelor of Engineering (B.E.) (Electronics and Telecommunication Engineering)
2016-2020
Joydeep Debnath Summary
- Joydeep Debnath, based in Bengaluru, KA, IN, is currently a Senior Analog Design Engineer at Renesas Electronics. Joydeep Debnath brings experience from previous roles at Intel Corporation and Texas Instruments. Joydeep Debnath holds a 2016 - 2020 Bachelor of Engineering (B.E.) in Electronics and Telecommunication Engineering @ Jadavpur University. Joydeep Debnath has 3 emails on RocketReach.
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