Joseph Pacheco Email & Phone Number
IC Design Engineer 2 @ Analog Devices
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Joseph Pacheco Location
- Santa Clara, CA, US
Joseph Pacheco Work
- IC Design Engineer 2 @ (April 2019 - Present)
- Electrical Engineering Intern @ (June 2018 - August 2018)
Joseph Pacheco Education
- California Polytechnic State University-San Luis Obispo
Bachelor of Science - BS (Electrical Engineering)
2012-2017
Joseph Pacheco Summary
- Joseph Pacheco, based in Santa Clara, CA, US, is currently a IC Design Engineer 2 at Analog Devices. Joseph Pacheco brings experience from previous roles at Rio Tinto. Joseph Pacheco holds a 2012 - 2017 Bachelor of Science - BS in Electrical Engineering @ California Polytechnic State University-San Luis Obispo. Joseph Pacheco has 3 emails and 1 mobile phone numbers on RocketReach.
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