Jonathan Tung Email
MTS Silicon Design Engineer @ AMD
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Jonathan Tung Location
- Toronto, ON, CA
Jonathan Tung Work
- MTS Silicon Design Engineer @ (March 2020 - Present)
- Principal Asic Engineer @ (July 2019 - March 2020)
- Lead Asic Engineer @ (January 2016 - June 2019)
- Product Design Engineer @ (April 2011 - November 2015)
- Asic Design Engineer @ Wavesat (March 2010 - March 2011)
- Asic Design Engineer @ (May 2007 - April 2009)
- Asic and DSP Intern @ (January 2006 - December 2006)
Jonathan Tung Education
- McGill University
Bachelors (Electrical Engineering)
2002-2007
Jonathan Tung Summary
- Jonathan Tung, based in Toronto, ON, CA, is currently a MTS Silicon Design Engineer at Amd. Jonathan Tung brings experience from previous roles at Cadence Design Systems, PMC-Sierra and Wavesat. Jonathan Tung holds a 2002 - 2007 Bachelors in Electrical Engineering @ McGill University. Jonathan Tung has 3 emails on RocketReach.
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