Jon Ho Email
High-Speed Analog I and O Circuit Designer @ IBM
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Jon Ho Location
- Rochester, MN, US
Jon Ho Work
- High-Speed Analog I and O Circuit Designer @ (January 2026 - Present)
- Silicon Engineering Intern (RFIC) @ (May 2024 - August 2024)
- Satellite Payload Engineering Co-op @ (August 2023 - December 2023)
- Analog IC Design Sub-Team Lead @ (August 2022 - September 2023)
- Mixed-Signal IC Design Intern @ (May 2023 - August 2023)
- Power Electronics Intern @ (June 2022 - August 2022)
- Engineering Learning Initiatives Grant (Apsel Lab) @ (May 2021 - September 2021)
- 2nd Sergeant @ (September 2019 - April 2020)
- 3rd Sergeant @ (February 2019 - September 2019)
Jon Ho Education
- University of Southern California
Master of Science - MS (Electrical and Electronics Engineering)
2024-2025 - Cornell University
Bachelor of Science - BS (Electrical and Computer Engineering)
2020-2024
Jon Ho Summary
- Jon Ho, based in Rochester, MN, US, is currently a High-Speed Analog I and O Circuit Designer at IBM. Jon Ho brings experience from previous roles at SpaceX, Cornell Custom Silicon Systems and Analog Devices. Jon Ho holds a 2024 - 2025 Master of Science - MS in Electrical and Electronics Engineering @ University of Southern California. Jon Ho has 1 emails on RocketReach.
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