Jon Ho Email
High-Speed Analog I and O Circuit Designer @ IBM
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Jon Ho Location
- Rochester, MN, US
Jon Ho Work
- 2026 -now High-Speed Analog I and O Circuit Designer @
- 2024 -2026 Graduate Research Fellow @
- 2024 -2024 Silicon Engineering Intern (RFIC) @
- 2023 -2023 Satellite Payload Engineering Co-op @
- 2022 -2023 Analog IC Design Sub-Team Lead @
- 2023 -2023 Mixed-Signal IC Design Intern @
- 2022 -2022 Power Electronics Intern @
- 2021 -2021 Engineering Learning Initiatives Grant (Apsel Lab) @
- 2019 -2020 2nd Sergeant @
- 2019 -2019 3rd Sergeant @
Jon Ho Education
- University of Southern California
Master of Science - MS (Electrical and Electronics Engineering)
2024-2025 - Cornell University
Bachelor of Science - BS (Electrical and Computer Engineering)
2020-2024
Jon Ho Summary
- Jon Ho, based in Rochester, MN, US, is currently a High-Speed Analog I and O Circuit Designer at IBM. Jon Ho brings experience from previous roles at University of Southern California, SpaceX and Cornell Custom Silicon Systems. Jon Ho holds a 2024 - 2025 Master of Science - MS in Electrical and Electronics Engineering @ University of Southern California. Jon Ho has 1 emails on RocketReach.
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