Jon Halter Email & Phone Number
Principal FPGA Engineer @ Motorola Solutions
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Jon Halter Location
- Hoffman Estates, IL, US
Jon Halter Work
- Principal FPGA Engineer @ (July 2009 - Present)
- Modem IP Design Engineer @ (February 2005 - October 2009)
- SoC Design Engineer @ (August 1998 - February 2005)
- Flash Memory Design Engineer @ (June 1997 - August 1998)
Jon Halter Education
- University of Illinois Urbana-Champaign 1995-1997
- Purdue University 1990-1995
Jon Halter Skills
- Verilog
- ASIC
- Wireless
- FPGA
- Integrated Circuit Design
- SoC
- Debugging
- System Architecture
- Functional Verification
- Static Timing Analysis
- Integrated Circuit
- Design
- Telecommunications
- Shure
- Digital Design
- Adobe Creative Suite
- VHDL
- Xilinx
- ModelSim
- Graphic Design
Jon Halter Summary
- Jon Halter, based in Hoffman Estates, IL, US, is currently a Principal FPGA Engineer at Motorola Solutions. Jon Halter brings experience from previous roles at Freescale Semiconductor, PrairieComm and Motorola Semiconductor. Jon Halter holds a 1995 - 1997 University of Illinois Urbana-Champaign. With a robust skill set that includes Verilog, ASIC, Wireless, FPGA, Integrated Circuit Design and more. Jon Halter has 3 emails and 1 mobile phone numbers on RocketReach.
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