John Tran Location

Union City, CA, US

John Tran Work

  • 2011 - now  Sr. Failure Analysis Engineer @ Aptina
  • 2000 - now  Senior Product and Failure Analysis Engineer (TIG and Engineering Services Group) @ National Semiconductor
  • 1999 - 2000 Sr. Product Engineer and Sr Failure Analysis Engineer (for Standard Analog Devices) @ Supertex Inc., Sunnyvale, CA
  • 1988 - 1996 Sr. Reliability and FA and QA Engineer (for Transceivers, Display, Digital, Bipolar, Interface @ NATIONAL SEMICONDUCTOR CORP., Santa Clara, CA

John Tran Education

  • California State University-Sacramento

    BS EEE (Semiconductor Devices)

    1985 - 1988

John Tran Skills

  • Failure Analysis
  • Mixed Signal
  • Semiconductors
  • CMOS

John Tran Summary

John Tran, based in Union City, CA, US, is currently a Sr. Failure Analysis Engineer at Aptina. John Tran brings experience from previous roles at National Semiconductor, Supertex Inc., Sunnyvale, CA and NATIONAL SEMICONDUCTOR CORP., Santa Clara, CA. John Tran holds a 1985 - 1988 BS EEE in Semiconductor Devices @ California State University-Sacramento. With a robust skill set that includes Failure Analysis, Mixed Signal, Semiconductors, CMOS and more. John Tran has 3 emails and 2 mobile phone numbers on RocketReach.

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