John Braswell Email & Phone Number
Digital Design Engineer @ EfficientAI
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John Braswell Location
- Pittsburgh, PA, US
John Braswell Work
- 2024 -now Digital Design Engineer @
- 2022 -2024 Lead FPGA Design Engineer @
- 2021 -2022 Staff Engineer @
- 2020 -2021 Sr. Design Engineer @
- 2018 -2020 FPGA and DSP Software Engineer @ Tethers Unlimited Inc.
- 2016 -2018 FPGA Engineer @
- 2013 -2016 ASIC Engineer II @
- 2011 -2011 Embedded Software Engineer Intern @
- 2010 -2010 Software Engineer Intern @ Harris RF Communications
- 2009 -2009 Software Engineer Intern @ Harris RF Communications
John Braswell Education
- University of Rochester
Master of Science (MS) (Electrical Engineering)
2011-2012 - Rochester Institute of Technology
BS (Electrical Engineering Technology)
2005-2011
John Braswell Skills
- Jama
- Requirements Management
- Electrical Engineering
- SystemVerilog
- VHDL
- Embedded Systems
- DSP
- Verilog
- Linux
- Object Oriented Design
- UVM
- Simulations
- Altera Quartus
- Git
- Xilinx ISE
- Matlab
- C
- C++
- SystemVerilog Assertions
- Six Sigma
- Python (Programming Language)
- Object-Oriented Programming (OOP)
John Braswell Summary
- John Braswell, based in Pittsburgh, PA, US, is currently a Digital Design Engineer at Efficient Computer. John Braswell brings experience from previous roles at Owl Cyber Defense, CoMira Solutions Inc. and Tethers Unlimited Inc.. John Braswell holds a 2011 - 2012 Master of Science (MS) in Electrical Engineering @ University of Rochester. With a robust skill set that includes Jama, Requirements Management, Electrical Engineering, SystemVerilog, VHDL and more. John Braswell has 2 emails and 2 mobile phone numbers on RocketReach.
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