Jitendra Shaw Email
SOC design verification Engineer @ Intel Corporation
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Jitendra Shaw Location
- Bengaluru, KA, IN
Jitendra Shaw Work
- 2024 -now SOC design verification Engineer @
- 2023 -2024 Senior Design Verification Engineer @
- 2020 -2023 SOC design Verification Engineer @
- 2017 -2020 Member Of Technical Staff @
- 2013 -2017 Senior Design Engineer @
- 2008 -2013 Lead Design Engineer at Freescale Semiconductor @
- 2007 -2008 Design Engineer @
- 2005 -2007 design engineer @
Jitendra Shaw Education
- Jadavpur University
Bachelor of Engineering (BE) (Electronics and Communications Engineering)
2001-2005 - T.D.B college 1998-2000
Jitendra Shaw Skills
- SystemVerilog
- Specman
- JTAG
- Simulations
- DDR2
- DDR
- SoC
- ASIC
- VLSI
- Verilog
- Functional Verification
- Low power verification
- EDA
- Design
Jitendra Shaw Summary
- Jitendra Shaw, based in Bengaluru, KA, IN, is currently a SOC design verification Engineer at Intel Corporation. Jitendra Shaw brings experience from previous roles at Tessolve Semiconductor Pvt. Ltd., Intel Corporation and AMD. Jitendra Shaw holds a 2001 - 2005 Bachelor of Engineering (BE) in Electronics and Communications Engineering @ Jadavpur University. With a robust skill set that includes SystemVerilog, Specman, JTAG, Simulations, DDR2 and more. Jitendra Shaw has 4 emails on RocketReach.
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