Jingchi Yang Email & Phone Number
ASIC Design Engineer @ Google
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Jingchi Yang Location
- Sunnyvale, CA, US
Jingchi Yang Work
- ASIC Design Engineer @ (August 2022 - Present)
- Sr FPGA Engineer @ (January 2020 - August 2022)
- System Engineer Intern @ (May 2019 - August 2019)
- FPGA developer intern @ (February 2017 - August 2017)
Jingchi Yang Education
- Georgia Institute of Technology
Doctor of Philosophy (Ph.D.) (Electrical and Electronics Engineering)
2015-2019 - Georgia Institute of Technology
Master's degree (Electrical and Computer Engineering)
2014-2015 - University of Lille 1 Sciences and Technology
Bachelor's degree (Electrical and Electronics Engineering)
2012-2014
Jingchi Yang Skills
- Field-Programmable Gate Arrays (FPGA)
- RTL Design & System Verification
- Firmware & Embedded Systems
- Printed Circuit Board (PCB) Design
- HTML
- C/C++
- Firmware
- Altium Designer
- Xilinx Vivado
- MSP430
- Debugging
Jingchi Yang Summary
- Jingchi Yang, based in Sunnyvale, CA, US, is currently a ASIC Design Engineer at Google. Jingchi Yang brings experience from previous roles at Samsung Electronics and Alibaba Cloud. Jingchi Yang holds a 2015 - 2019 Doctor of Philosophy (Ph.D.) in Electrical and Electronics Engineering @ Georgia Institute of Technology. With a robust skill set that includes Field-Programmable Gate Arrays (FPGA), RTL Design & System Verification, Firmware & Embedded Systems, Printed Circuit Board (PCB) Design, HTML and more. Jingchi Yang has 3 emails and 1 mobile phone numbers on RocketReach.
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