Jigar Sheth Location
- Fremont, CA, US
Jigar Sheth Work
- 2014 -now ASIC Design Engineer @
- 2012 -2014 ASIC Design Engineer @ Samsung Semiconductor
- 2011 -2012 Characterization Engineer @
- 2008 -2008 Design Engineer @ Maharshi Electronics Systems
Jigar Sheth Education
- California State University-Sacramento
Master of Science (Electrical and Electronics Engineering)
2009-2011 - L.D. College of Engineering
Bachelor of Engineering - BE (Electronics and Communication Engineering)
2004-2008
Jigar Sheth Skills
- SystemVerilog
- DFT
- ASIC
- CMOS
- Static Timing Analysis
- Logic Design
- Timing Closure
- VLSI
- Verilog
- Integrated Circuit Design
- SoC
- TCL
- Logic Synthesis
- Perl
Jigar Sheth Summary
- Jigar Sheth, based in Fremont, CA, US, is currently a ASIC Design Engineer at Apple. Jigar Sheth brings experience from previous roles at Samsung Semiconductor, SanDisk and Maharshi Electronics Systems. Jigar Sheth holds a 2009 - 2011 Master of Science in Electrical and Electronics Engineering @ California State University-Sacramento. With a robust skill set that includes SystemVerilog, DFT, ASIC, CMOS, Static Timing Analysis and more. Jigar Sheth has 4 emails and 2 mobile phone numbers on RocketReach.
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