Jigar Bhatt Email & Phone Number
Sr. Verification Engineer @ Intel Corporation
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Jigar Bhatt Location
- Folsom, CA, US
Jigar Bhatt Work
- Sr. Verification Engineer @ (July 2015 - Present)
- Verfication Engineer @ (June 2012 - July 2015)
- Component Design Engineer @ (May 2010 - June 2012)
- Platform Design and Debug Engineer @ (October 2009 - July 2010)
- Platform Architect Intern @ (January 2008 - April 2009)
- Student Assistant @ (August 2007 - December 2008)
Jigar Bhatt Education
- California State University-Sacramento
Masters in Science
2006-2007 - Visvesvaraya Technological University
Bachelors in Engineering
2001-2005
Jigar Bhatt Skills
- SystemVerilog
- Design
- PCIe
- Static Timing Analysis
- Computer Architecture
- FPGA
- VLSI
- Verilog
- Component Design
- VHDL
- ModelSim
- Debugging
- Perl
- RTL design
Jigar Bhatt Summary
- Jigar Bhatt, based in Folsom, CA, US, is currently a Sr. Verification Engineer at Intel Corporation. Jigar Bhatt brings experience from previous roles at Intel Corporation. Jigar Bhatt holds a 2006 - 2007 Masters in Science @ California State University-Sacramento. With a robust skill set that includes SystemVerilog, Design, PCIe, Static Timing Analysis, Computer Architecture and more. Jigar Bhatt has 1 emails and 1 mobile phone numbers on RocketReach.
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