Principal Engineer, Physical Design Lead @ (September 2018 - September 2019)
CPU design and Implementation Lead @ (June 2011 - August 2015)
Member of Group of Technical Staff, CPU Design Engineer @ (July 1997 - May 2011)
ASIC Design Engineer @ (January 1997 - January 2011)
Jidong Wang Education
University of Wisconsin-Madison 1995-1997
Jidong Wang Skills
ASIC
Functional Verification
Static Timing Analysis
RTL design
TCL
SoC
Timing Closure
Verilog
IC
VHDL
FPGA
Logic Synthesis
Primetime
Physical Design
Clock Tree Synthesis
Graphic Design
Engineering
Marketing
Microsoft Excel
Semiconductors
Project Management
Jidong Wang Summary
Jidong Wang, based in Austin, TX, US, is currently a Principal Engineer at Flex Logix Technologies, Inc.. Jidong Wang brings experience from previous roles at HYGON, ZTE Microelectronics and MediaTek Inc. Jidong Wang holds a 1995 - 1997 University of Wisconsin-Madison. With a robust skill set that includes ASIC, Functional Verification, Static Timing Analysis, RTL design, TCL and more. Jidong Wang has 3 emails and 3 mobile phone numbers on RocketReach.
Looking for a different Jidong Wang?
Find contact details for 700 million professionals.