Jiang Liu Email & Phone Number
Senior Principal SoC Product Engineer (Technical lead) @ NXP Semiconductors
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Jiang Liu Location
- Austin, TX, US
Jiang Liu Work
- 2022 -now Senior Principal SoC Product Engineer (Technical lead) @
- 2018 -now Tech Lead, Principle R and D NVM Test and Logic Design Engineer @
- 2022 -2024 Tech lead, Senior Principal NVM R and D Test and Logic Design Engineer @
- 2014 -2018 Senior NVM R and D Test and Logic Design Engineer @
- 2011 -2014 SoC Test Engineer @
- 2011 -2011 SoC System Engineering @
- 2009 -2011 SoC Burn in Test Engineer @
- 2008 -2009 SoC Product Engineer @
Jiang Liu Education
- The University of Edinburgh
Master of Engineering (hons) (Electronic Engineering)
2004-2009 - James Gillespies High School
Jiang Liu Skills
- C++
- Microcontrollers
- Embedded Systems
- Validation
- Debugging
- PowerPC
- Embedded C
- C
- Electronics
- Mixed Signal
- SoC
- Analog
- Microelectronics
- Application-Specific Integrated Circuits (ASIC)
- Semiconductors
- Testing
- System on a Chip (SoC)
- Verilog
- Ruby
- Linux
- Leadership
- Communications
- Cross-functional Team Leadership
- RTL Design
- RTL
- Verification and Validation (V&V)
- Cross-team Collaboration
- Digital IC Design
- Flash Design
- RRAM
- Design
- Jira
- Confluence
- Bitbucket
- Atlassian Bamboo
- GitHub
- ATE
- Agile Methodologies
- Flash
- NVM
- C (Programming Language)
- Firmware
- NPI Management
Jiang Liu Summary
- Jiang Liu, based in Austin, TX, US, is currently a Senior Principal SoC Product Engineer (Technical lead) at NXP Semiconductors. Jiang Liu brings experience from previous roles at NXP Semiconductors and NXP acquires Freescale Semiconductor. Jiang Liu holds a 2004 - 2009 Master of Engineering (hons) in Electronic Engineering @ The University of Edinburgh. With a robust skill set that includes C++, Microcontrollers, Embedded Systems, Validation, Debugging and more. Jiang Liu has 2 emails and 1 mobile phone numbers on RocketReach.
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