Ji Chen Email & Phone Number
Staff Analog Design Engineer @ Intel Corporation
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Ji Chen Location
- Santa Clara, CA, US
Ji Chen Work
- 2013 -now Staff Analog Design Engineer @
- 2010 -2011 Sr. RFIC design engineer @
- 2007 -2010 Senior analog and RFIC Design Engineer @ NanoAmp Solutions
- 2006 -2007 Senior analog and RFIC Design Engineer @ Mobert Semiconductor
- 2006 -2006 Senior Electrical Engineer @
Ji Chen Education
- University of Central Florida
phd (Electrical Engineering)
2001-2006 - Fudan University
B.S. (Microelectronics)
1997-2001
Ji Chen Skills
- PLL
- IC
- CMOS
- Analog
- VCO
- Circuit Design
- Spectre
- Mixed Signal
- Semiconductors
- ASIC
- Analog Circuit Design
- Cadence Virtuoso
- Matlab
- Electrical Engineering
- SoC
- RF
- Low-power Design
- Integrated Circuit Design
- EDA
- Verilog
- Signal
- Design Engineering
- Engineering
- Manufacturing
- Design
- Low Power Design
Ji Chen Summary
- Ji Chen, based in Santa Clara, CA, US, is currently a Staff Analog Design Engineer at Intel Corporation. Ji Chen brings experience from previous roles at Quantenna Communications, NanoAmp Solutions, Mobert Semiconductor and Skyworks Solutions, Inc.. Ji Chen holds a 2001 - 2006 phd in Electrical Engineering @ University of Central Florida. With a robust skill set that includes PLL, IC, CMOS, Analog, VCO and more. Ji Chen has 4 emails and 1 mobile phone numbers on RocketReach.
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