Jeffrey Low Email
FPGA Engineer @ DSO National Laboratories
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Jeffrey Low Location
- Singapore
Jeffrey Low Work
- 2021 -now Member Of Technical Staff @
- 2021 -now FPGA Engineer @
- 2024 -2024 Research Intern @
- 2020 -2021 Research Intern @
- 2019 -2019 Research Intern @
- 2018 -2018 Research Intern @
- 2016 -2018 Admin Support Assistant @
- 2015 -2016 Research Intern @
- 2015 -2015 Research Intern @
- 2015 -2015 Research Intern @
Jeffrey Low Education
- Carnegie Mellon University
Master of Science - MS (Electrical and Computer Engineering)
2023-2025 - National University of Singapore
Bachelor of Engineering - BE (Electrical and Electronics Engineering)
2018-2021 - Linköping University 2019-2019
Jeffrey Low Summary
- Jeffrey Low, based in Singapore, is currently a FPGA Engineer at DSO National Laboratories. Jeffrey Low brings experience from previous roles at DSO National Laboratories and AMD. Jeffrey Low holds a 2023 - 2025 Master of Science - MS in Electrical and Computer Engineering @ Carnegie Mellon University. Jeffrey Low has 1 emails on RocketReach.
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