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Jeffrey Heath Location
Eau Claire, WI, US
Jeffrey Heath Work
RLS Engineer @ (July 2013 - Present)
Sr Design Verification Engineer @ Open-Silicon (January 2009 - January 2013)
Design Verification Engineer @ Ciber (December 2003 - November 2004)
Jeffrey Heath Education
University of Wisconsin-Stout
Jeffrey Heath Skills
SystemVerilog
TCL
Perl
Debugging
ASIC
Functional Verification
Verilog
VHDL
C
EDA
Unix
NCSim
SoC
Static Timing Analysis
C++
Hardware
Timing Closure
Formal Verification
Linux
Physical Design
Firmware
FPGA
Embedded Systems
VMM
RTL design
Jeffrey Heath Summary
Jeffrey Heath, based in Eau Claire, WI, US, is currently a RLS Engineer at Intel Corporation. Jeffrey Heath brings experience from previous roles at Open-Silicon and Ciber. Jeffrey Heath holds a University of Wisconsin-Stout. With a robust skill set that includes SystemVerilog, TCL, Perl, Debugging, ASIC and more. Jeffrey Heath has 4 emails and 1 mobile phone numbers on RocketReach.
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