Jeff Willey Email & Phone Number
Senior Principal Engineer, Pre-silicon DV Quality and Methodology @ Altera
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Jeff Willey Location
- Timnath, CO, US
Jeff Willey Work
- 2024 -now Senior Principal Engineer, Pre-silicon DV Quality and Methodology @
- 2020 -2024 Senior Principal Engineer, IP to SoC Handoff TFM and Quality @
- 2016 -2020 Principal Engineer, IP and Subsystem DV @
- 2013 -2016 Senior Staff Engineer, Pre-silicon SoC DV @
- 2009 -2013 Senior Staff Engineer, Pre-silicon CPU DV @
- 2005 -2009 CPU Validation Technical Lead, Itanium 9300 family @
- 1998 -2005 CPU Validation Expert @
Jeff Willey Education
- Carnegie Mellon University
Bachelor of Science - BS (Electrical and Computer Engineering)
1994-1998 - Carnegie Mellon University
Bachelor of Science - BS (Engineering and Public Policy)
1994-1998
Jeff Willey Skills
- Validation
- Semiconductors
- Processors
- Verilog
- Embedded Systems
- C++
- SystemC
- Computer Architecture
- OVM
- Server Architecture
- Protocol Design
- Microarchitecture
- SoC
- Computer System Validation
- Program Management
- Requirements Analysis
- Quality Assurance
- FDA
- Functional Verification
- Hardware Architecture
- Debugging
Jeff Willey Summary
- Jeff Willey, based in Timnath, CO, US, is currently a Senior Principal Engineer, Pre-silicon DV Quality and Methodology at Altera. Jeff Willey brings experience from previous roles at Intel Corporation. Jeff Willey holds a 1994 - 1998 Bachelor of Science - BS in Electrical and Computer Engineering @ Carnegie Mellon University. With a robust skill set that includes Validation, Semiconductors, Processors, Verilog, Embedded Systems and more. Jeff Willey has 1 emails on RocketReach.
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