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Jeff Ebert Location
Half Moon Bay, CA, US
Jeff Ebert Work
2019 -now Senior Manager, IO, Embedded, and Debug Software @
2017 -2019 Principal Consultant @ Ebert Embedded
2015 -2017 Sr. Director and Sr. Principal Engineer, ASICs and Hardware @
2012 -2015 Director, ASIC Engineering @
2010 -2012 ASIC Design Manager @
2007 -2010 Technical Leader @
2005 -2007 Senior Staff Engineer @
2005 -2005 Principal Engineer @
1998 -2004 Lead Verification Engineer @
1994 -1998 Member of the Technical Staff @
Jeff Ebert Education
University of Virginia
MS (Electrical Engineering)
1993-1994
University of Virginia
BS (Electrical Engineering)
1989-1992
Jeff Ebert Skills
Hardware Architecture
Field Programmable Gate Arrays Fpga
Functional Verification
RTL design
Microprocessors
Processors
UVM
ASIC
System Design
VLSI
Verilog
Integrated Circuit Design
TCL
Embedded Systems
Application Specific Integrated Circuits Asic
FPGA
SoC
EDA
SystemVerilog
Semiconductors
SystemC
Verification
System Architecture
IC
Application Specific Integrated Circuits
Field Programmable Gate Arrays
Jeff Ebert Summary
Jeff Ebert, based in Half Moon Bay, CA, US, is currently a Senior Manager, IO, Embedded, and Debug Software at Cerebras Systems. Jeff Ebert brings experience from previous roles at Ebert Embedded and Silver Spring Networks. Jeff Ebert holds a 1993 - 1994 MS in Electrical Engineering @ University of Virginia. With a robust skill set that includes Hardware Architecture, Field Programmable Gate Arrays Fpga, Functional Verification, RTL design, Microprocessors and more. Jeff Ebert has 1 emails and 1 mobile phone numbers on RocketReach.
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