Jayita Das Email & Phone Number
CPU Physical Design Engineer @ Intel Corporation
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Jayita Das Location
- Hillsboro, OR, US
Jayita Das Work
- CPU Physical Design Engineer @ (February 2021 - Present)
- Sr. Technology and Design Integration Engineer @ (February 2015 - Present)
Jayita Das Education
- University of South Florida
Doctor of Philosophy (Ph.D.) (Electrical Engineering)
2010-2014 - University of South Florida
Master of Science (MS) (Electrical Engineering)
2010-2013 - National Institute Of Technology Durgapur
Bachelor of engineering (electronics and communication engineering)
2000-2004
Jayita Das Skills
- CMOS
- STT-MRAM
- SRAM
- Circuit Design
- Cadence Virtuoso
- Matlab
- Spintronics
- Verilog-A
- Verilog
- Perl
- OOMMF
- Cadence
- IC
- LaTeX
- Hardware Security
- Layout
- MTJ
- Integrated Circuit Design
- Simulations
- Python
- R
- Technology
- Design
- Intel
- Integration
- Stt Mram
Jayita Das Summary
- Jayita Das, based in Hillsboro, OR, US, is currently a CPU Physical Design Engineer at Intel Corporation. Jayita Das brings experience from previous roles at Intel Corporation. Jayita Das holds a 2010 - 2014 Doctor of Philosophy (Ph.D.) in Electrical Engineering @ University of South Florida. With a robust skill set that includes CMOS, STT-MRAM, SRAM, Circuit Design, Cadence Virtuoso and more. Jayita Das has 2 emails and 1 mobile phone numbers on RocketReach.
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