Jayesh Pakhale's Location

Austin, TX, US

Jayesh Pakhale's Work

  • Senior ASIC Design Verification Engineer @ Amazon
  • Principal Design and Verification Engineer @ SanDisk®
  • Hardware Engineer @ CareFusion

Jayesh Pakhale's Education

  • San Diego State University

    Masters (Electrical and Computer Engineering)

    2007 - 2009
  • Nirma Institue of Technology, Gujarat University

    Bachelor (Electronics and Communication)

    2002 - 2005

Jayesh Pakhale's Skills

  • VHDL
  • Hardware Architecture
  • PCB design
  • Verilog
  • SystemVerilog
  • Testing
  • Perl
  • Hardware
  • UVM
  • RTL coding

Jayesh Pakhale's Summary

Jayesh Pakhale, based in Austin, TX, US, is currently a Senior ASIC Design Verification Engineer at Amazon, bringing experience from previous roles at SanDisk®, CareFusion and Entity Soltuions Limited. Jayesh Pakhale holds a 2007 - 2009 Masters in Electrical and Computer Engineering @ San Diego State University. With a robust skill set that includes VHDL, Hardware Architecture, PCB design, Verilog, SystemVerilog and more, Jayesh Pakhale contributes valuable insights to the industry. Jayesh Pakhale has 2 emails and 1 mobile phone number on RocketReach.

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