Jayesh Karwarker's Location
Bengaluru, KA, IN
Jayesh Karwarker's Work
- Graphics Power and Performance Engineer @ Intel Corporation
- Senior Design Engineer @ Wafer Space - An ACL Digital Company
- RTL Design Engineer @ Album Semiconductors
- Solutions Development Engineer @ Collabera Digital
Jayesh Karwarker's Education
- CDAC-ATC, Mumbai
PG-Diploma (VLSI)
2015 - 2016 - Goa College of Engineering
Master of Engineering (M.Eng.) (Microelectronics)
2012 - 2014
Jayesh Karwarker's Skills
- Verilog
- Analog Circuit Design
- VLSI
- Analog
- CMOS
- IC
- VHDL
- FPGA
- Cadence Virtuoso
- ASIC
Jayesh Karwarker's Summary
Jayesh Karwarker, based in Bengaluru, KA, IN, is currently a Graphics Power and Performance Engineer at Intel Corporation, bringing experience from previous roles at Wafer Space - An ACL Digital Company, Album Semiconductors and Collabera Technologies. Jayesh Karwarker holds a 2015 - 2016 PG-Diploma in VLSI @ CDAC-ATC, Mumbai. With a robust skill set that includes Verilog, Analog Circuit Design, VLSI, Analog, CMOS and more, Jayesh Karwarker contributes valuable insights to the industry. Jayesh Karwarker has 1 email on RocketReach.
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