Jayendra Patel Location
- California, United States
Jayendra Patel Work
- 2022 -now RF Design Lead @
- 2021 -2022 RF System Engineer @
- 2017 -2021 Senior RF Design Engineer @
- 2014 -2017 Sr RF Engineer @
- 2013 -2014 Electrical Engineer @
- 2011 -2013 Graduate Student @
- 2012 -2012 RF Technician @
- 2010 -2010 Intern @ Service India LTD
- 2010 -2010 Intern @ At Streamline Control Pvt. Ltd
Jayendra Patel Education
- The University of Texas at Dallas
M.S (Electrical Engineering)
2011-2013 - Gujarat University
B.E (Electronics & communication)
2006-2010
Jayendra Patel Skills
- Spectrum Analyzer
- RF
- Integrated Circuit Design
- Circuit Design
- Mixed Signal
- AWR Microwave Office
- Agilent ADS
- Hardware Design
- Analog Design
- Smith Chart
- RF Board Level Design
- Cadence Virtuoso
- cadence allegro
- HFSS
- Vector Network Analyzer (VNA)
- Radio Frequency (RF)
- PCB Design
- Integrated Circuits (IC)
- Power Amplifiers
- WiFi
- BLE
- Schematic
- RF Design
- RF Systems
- ATPG
- Planning
- Power Meters
- Digital Electronics
- Generators
- Perl
- Functional Verification
- Matlab
- Analog
- CDMA
- Programming
- Embedded Systems
- Vector
- Labview
- Keil
- MPLAB
- Synopsys tools
- Simulations
- Design
- Analyzer
- Routing
- OFDM
- IC
- Signal
- Oscilloscope
- Assembly Language
- RTL design
- Networking
- WCDMA
- Digital Design
- Timing
- VLSI
- Layout
- Xilinx
- Network Analyzer
- Computer Programming
- Integrated Circuits Ic
- Testing
- Embedded C
- LVS
- ModelSim
- DSP
- SystemVerilog
- Assembly
- IEEE
- DRC
- Scan
- Investigation
- Eagle
- Rx
- Computer Architecture
- Radio Frequency Rf
- C
- Spectrum
- DFT
- Sensors
- Spectre
- ASIC
- Verilog
- Solutions
- Energy
- Microwave
- Tetramax
- Vector Network Analyzer Vna
- FPGA
- RTL coding
- Electrical Engineering
- NI Multisim
- System Performance
- RF circuits
- Surface
- Measurements
- Static Timing Analysis
- Logic Analyzer
- Schematic Capture
- BIST
- Layout Design
- Electronics
- CAD
- Microcontrollers
- GSM
- Ise
- Multisim
- Agilent
- Analytical Skill
- Manufacturing
- VHDL
- Simulation
- LTE
- Semiconductors
- Optimization
- Vlsi Design
- Virtuoso
- Radio Frequency
- Integrated Circuits
- Vector Network Analyzer
Jayendra Patel Summary
- Jayendra Patel, based in California, United States, is currently a RF Design Lead at Amazon Lab126. Jayendra Patel brings experience from previous roles at Amazon Lab126, Aruba, a Hewlett Packard Enterprise company, Skyworks Solutions, Inc. and Qualcomm. Jayendra Patel holds a 2011 - 2013 M.S in Electrical Engineering @ The University of Texas at Dallas. With a robust skill set that includes Spectrum Analyzer, RF, Integrated Circuit Design, Circuit Design, Mixed Signal and more. Jayendra Patel has 5 emails and 1 mobile phone numbers on RocketReach.
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Tapas Roy
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Yanning Li
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Eric Ow
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Joshua Danovitz
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Stuart Black
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Ben Jones
Head of Finance, WW Operations and Supply Chain
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Anthony Robson
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Alex P
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Vijay Bolleddu
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