Jaydeep Parmar Email & Phone Number
Silicon Packaging Design Engineer @ Intel Corporation
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Jaydeep Parmar Location
- Bengaluru, KA, IN
Jaydeep Parmar Work
- 2021 -now Silicon Packaging Design Engineer @
- 2020 -2021 Sr. Embedded Hardware Design Engineer @
- 2016 -2020 PCB Design Engineer (E-CAD design) @
- 2015 -2016 Design and Quality Engg. @
- 2015 -2015 Asst. Embedded Developer @
- 2015 -2015 Tranning @ Accord Synergy Pvt Ltd
Jaydeep Parmar Education
- Gujarat Technological University (GTU)
Bachelor of Engineering - BE (volleyball, Badminton, chess)
2012-2015 - M.S.University,Baroda
Diploma (Electronics & Communication Engineering)
2009-2012 - Shivam Vidyalaya
High School
2000-2009
Jaydeep Parmar Summary
- Jaydeep Parmar, based in Bengaluru, KA, IN, is currently a Silicon Packaging Design Engineer at Intel Corporation. Jaydeep Parmar brings experience from previous roles at Glide Technology Pvt Ltd, Matrix Comsec and PStronics. Jaydeep Parmar holds a 2012 - 2015 Bachelor of Engineering - BE in volleyball, Badminton, chess @ Gujarat Technological University (GTU).
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