Jayanth Kashyap Email
VLSI Design verification engineer @ SmartSoC Solutions Pvt Ltd
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Jayanth Kashyap Location
- Bengaluru, KA, IN
Jayanth Kashyap Work
- VLSI Design verification engineer @ (July 2022 - Present)
- Intern @ (May 2019 - June 2019)
Jayanth Kashyap Education
- M. S. RAMAIAH UNIVERSITY OF APPLIED SCIENCES
Master of Engineering - MEng (VLSI and nanotechnology)
2020-2022
Jayanth Kashyap Skills
- SystemVerilog
- Universal Verification Methodology (UVM)
- Verdi
- Interpersonal Relationships
- Debate
- Python (Programming Language)
- Verilog
- OrCAD PSpice
Jayanth Kashyap Summary
- Jayanth Kashyap, based in Bengaluru, KA, IN, is currently a VLSI Design verification engineer at SmartSoC Solutions Pvt Ltd. Jayanth Kashyap brings experience from previous roles at Schneider Electric. Jayanth Kashyap holds a 2020 - 2022 Master of Engineering - MEng in VLSI and nanotechnology @ M. S. RAMAIAH UNIVERSITY OF APPLIED SCIENCES. With a robust skill set that includes SystemVerilog, Universal Verification Methodology (UVM), Verdi, Interpersonal Relationships, Debate and more. Jayanth Kashyap has 2 emails on RocketReach.
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