Jayakumar V Email

Post Silicon Validation Engineer @ TESSOLVE EMBEDDED SYSTEMS

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Jayakumar V Location

San Jose, CA, US

Jayakumar V Work

2022 - now Post Silicon Validation Engineer @ TESSOLVE EMBEDDED SYSTEMS
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2024 - now Post Silicon Validation Engineer (from Tessolve) @ Texas Instruments
2022 - 2024 Post Silicon Validation Engineer (Contingent Worker from Tessolve) @ Intel Corporation

2021 - 2022 LabVIEW software Developer @ Safran
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2017 - 2021 LabVIEW Software Developer @ MultiVersal Automation

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Jayakumar V Education

SRM Valliammai Engineering College, Chennai
Bachelor of Engineering - BE (Electrical, Electronics and Communications Engineering)
2013 - 2017

Jayakumar V Summary

Jayakumar V, based in San Jose, CA, US, is currently a Post Silicon Validation Engineer at Tessolve. Jayakumar V brings experience from previous roles at Texas Instruments, Intel Corporation, Captronic Systems Pvt Ltd and MultiVersal Automation. Jayakumar V holds a 2013 - 2017 Bachelor of Engineering - BE in Electrical, Electronics and Communications Engineering @ SRM Valliammai Engineering College, Chennai. Jayakumar V has 1 emails on RocketReach.

Jayakumar V Emails

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@ti.com

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