Jasveen Kaur Email & Phone Number
H and W Design Engineering Manager @ Intel Corporation
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Jasveen Kaur Location
- San Jose, CA, US
Jasveen Kaur Work
- H and W Design Engineering Manager @
- Senior Director @ (September 2025 - Present)
- Director, Server SoC Design @ (October 2023 - Present)
Jasveen Kaur Education
- Birla Institute of Technology and Science, Pilani
Bachelor of Engineering - BE
- The University of Texas at Austin
Master of Engineering - MEng
Jasveen Kaur Summary
- Jasveen Kaur, based in San Jose, CA, US, is currently a H and W Design Engineering Manager at Intel Corporation. Jasveen Kaur brings experience from previous roles at Intel Corporation. Jasveen Kaur holds a Bachelor of Engineering - BE @ Birla Institute of Technology and Science, Pilani. Jasveen Kaur has 1 emails and 1 mobile phone numbers on RocketReach.
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