Jasper Jia Email
Principal System Validation Engineer @ Microchip Technology Inc.
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Jasper Jia Location
- Burnaby, BC, CA
Jasper Jia Work
- Principal System Validation Engineer @ (September 2016 - Present)
- Senior Storage System Engineer @ (April 2019 - June 2020)
- Principal Product Engineer @ (December 2015 - May 2016)
- (Principal) Product Engineer @ (June 2007 - December 2015)
- Hardware R and D engineer @ GE (April 2006 - April 2007)
Jasper Jia Education
- 天津大学
Master's degree (EE)
2003-2006
Jasper Jia Skills
- ASIC
- Analog
- Analog Circuits
- CMOS
- Circuit Design
- Design of Experiments
- Electronics
- Embedded Systems
- Failure Analysis
- IC
- Mixed Signal
- Process Improvement
- Product Engineering
- Scalable storage system
- Semiconductor Industry
- Semiconductors
- Six Sigma
- Six sigma - Green Belt
- Testing
Jasper Jia Summary
- Jasper Jia, based in Burnaby, BC, CA, is currently a Principal System Validation Engineer at Microchip Technology Inc.. Jasper Jia brings experience from previous roles at Quantumem Technologies, NXP Semiconductors, Freescale Semiconductor and GE. Jasper Jia holds a 2003 - 2006 Master's degree in EE @ 天津大学. With a robust skill set that includes ASIC, Analog, Analog Circuits, CMOS, Circuit Design and more. Jasper Jia has 2 emails on RocketReach.
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