Jared Tan Email & Phone Number
Senior Engineering Manager, Discrete Graphics and AI Electrical Validation @ Intel Corporation
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Jared Tan Location
- Bayan Lepas, MY
Jared Tan Work
- Senior Engineering Manager, Discrete Graphics and AI Electrical Validation @ (July 2025 - Present)
- Electrical Validation Engineering Manager (R and D) - Discrete Graphics and Data Center @ (March 2022 - October 2025)
- Technical Program Manager @ (June 2021 - March 2022)
- Operations and co-founder @ (September 2020 - June 2021)
- Advanced Engineering Manager @ (August 2014 - August 2020)
- Technical Hardware Manager @ (January 2011 - July 2014)
- Senior Electrical Engineer @ (December 2008 - January 2011)
- Senior Hardware Engineer @ (October 2003 - December 2008)
Jared Tan Education
- Purdue University
Bachelor of Engineering (B.Eng.) (Electrical and Electronics Engineering)
1999-2003
Jared Tan Summary
- Jared Tan, based in Bayan Lepas, MY, is currently a Senior Engineering Manager, Discrete Graphics and AI Electrical Validation at Intel Corporation. Jared Tan brings experience from previous roles at Intel Corporation, Scoopoint and Haemonetics Malaysia Sdn. Bhd.. Jared Tan holds a 1999 - 2003 Bachelor of Engineering (B.Eng.) in Electrical and Electronics Engineering @ Purdue University. Jared Tan has 3 emails and 1 mobile phone numbers on RocketReach.
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