Janet Timmerman's Location
Arnhem-Nijmegen Metropolitan, GE, NL
Janet Timmerman's Work
- Sr. PDK Engineer @ Ampleon
- IC Layout and Chip Finishing Engineer @ Ampleon
- Sr. IC Layout Engineer @ Nexperia
- Coördinator of TeamNexperia Young @ Nexperia
- IC Layout Engineer @ Nexperia
- IC Layout Designer @ NXP Semiconductors
- Callcenteragent @ HMS
- Fundraiser @Shiptour @ Greenpeace
- Assistent manager @ Ousaber
- Commercial assistent @ La place
Janet Timmerman's Education
- NCOI University of Applied Sciences
Bachelor of Engineering - BE (Elektrotechniek)
2019 - 2024 - High Tech Institute
(Electronic Engineering)
2014 - 2015 - APMG International
Management Foundation degree (Prince II)
2013 - 2013
- Almere college, Ichthus college, Het Westeraam and Lorentz Lyceum.
HAVO (Technic)
2004 - 2009
Janet Timmerman's Skills
- Semiconductors
- Cadence Virtuoso
- DRC
- LVS
- Layout Verification
- CMOS
- SOI
- Floorplanning
- Layout Design
- Mixed Signal
Janet Timmerman's Summary
Janet Timmerman, based in Arnhem-Nijmegen Metropolitan Area, GE, NL, is currently a Sr. PDK Engineer at Ampleon, bringing experience from previous roles at Ampleon and Nexperia. Janet Timmerman holds a 2019 - 2024 Bachelor of Engineering - BE in Elektrotechniek @ NCOI University of Applied Sciences. With a robust skill set that includes Semiconductors, Cadence Virtuoso, DRC, LVS, Layout Verification and more, Janet Timmerman contributes valuable insights to the industry. Janet Timmerman has 2 emails on RocketReach.
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