Jan Brenner Email & Phone Number
Senior Layout Designer @ Texas Instruments
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Jan Brenner Location
- Grass Valley, CA, US
Jan Brenner Work
- Senior Layout Designer @ (April 2002 - Present)
- IC Layout Designer @ Silicon Systems (January 1981 - January 2002)
Jan Brenner Education
- California State University, Northridge
BA (Art)
1972-1976
Jan Brenner Skills
- Analog
- Debugging
- Integrated Circuit Design
- IC
- Semiconductors
- ASIC
- CMOS
- Physical Verification
- BiCMOS
- DRC
- Mixed Signal
- SoC
- Analog Circuit Design
Jan Brenner Summary
- Jan Brenner, based in Grass Valley, CA, US, is currently a Senior Layout Designer at Texas Instruments. Jan Brenner brings experience from previous roles at Silicon Systems. Jan Brenner holds a 1972 - 1976 BA in Art @ California State University, Northridge. With a robust skill set that includes Analog, Debugging, Integrated Circuit Design, IC, Semiconductors and more. Jan Brenner has 2 emails and 1 mobile phone numbers on RocketReach.
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