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James Ayers Location
Portland, OR, US
James Ayers Work
2010 -now Analog Design Engineer @
2002 -2010 Student and Research Assistant @
2004 -2005 Intern @
2003 -2003 Intern @
James Ayers Education
Oregon State University
PhD (Electrical Engineering)
2004-2009
Oregon State University
MS (Electrical Engineering)
2002-2004
Oregon State University
BS (Electrical Engineering)
1997-2002
James Ayers Skills
IC
Analog
Mixed Signal
Analog Circuit Design
Low-power Design
Integrated Circuit Design
Circuit Design
RF
Youth Mentoring
Cadence Virtuoso
VLSI
Integrated Circuit
Design
Power
Low Power Design
Analog Design
James Ayers Summary
James Ayers, based in Portland, OR, US, is currently a Analog Design Engineer at Intel. James Ayers brings experience from previous roles at Oregon State University, Intel and Intel Corporation. James Ayers holds a 2004 - 2009 PhD in Electrical Engineering @ Oregon State University. With a robust skill set that includes IC, Analog, Mixed Signal, Analog Circuit Design, Low-power Design and more. James Ayers has 4 emails and 3 mobile phone numbers on RocketReach.
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