Jaina Patel Email
Senior GPU Design Engineer @ Qualcomm
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Jaina Patel Location
- Seattle, WA, US
Jaina Patel Work
- 2025 -now Senior GPU Design Engineer @
- 2022 -2025 Senior Silicon Design Engineer @
- 2021 -2022 ASIC Digital Design Engineer, II @
- 2020 -2021 ASIC Digital Design Engineer, I @
- 2020 -2020 Digital IC Design Engineer @
- 2019 -2020 Research Intern @
- 2019 -2020 Graduate Teaching Assistant @
- 2018 -2018 Research Intern @
Jaina Patel Education
- University of Toronto
Master of Engineering - MEng (Computer Engineering)
2018-2020 - L.D. College of Engineering
Bachelor of Engineering - BE (Electronics and Communication)
2014-2018
Jaina Patel Summary
- Jaina Patel, based in Seattle, WA, US, is currently a Senior GPU Design Engineer at Qualcomm. Jaina Patel brings experience from previous roles at AMD, Synopsys Inc and Marvell Semiconductor. Jaina Patel holds a 2018 - 2020 Master of Engineering - MEng in Computer Engineering @ University of Toronto. Jaina Patel has 3 emails on RocketReach.
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